Automatic location of IC design errors using an e-beam system
dc.contributor.author | BOLAND, FRANCIS MORGAN | |
dc.date.accessioned | 2008-07-28T23:12:52Z | |
dc.date.available | 2008-07-28T23:12:52Z | |
dc.date.created | 09/12/1988 - 09/14/1 | en |
dc.date.issued | 1988 | |
dc.date.submitted | 1988 | en |
dc.identifier.citation | Melgara, M., Battu, M., Garino, P., Dowe, J., Vernay, Y.J., Marzouki, M., Boland, F., Automatic location of IC design errors using an e-beam system, [in] digest of papers - International Test Conference , Washington, DC, : IEEE, 1988, pp898-907 | en |
dc.identifier.other | Y | |
dc.identifier.other | 51289 | |
dc.identifier.other | Y | en |
dc.description | PUBLISHED | en |
dc.description.abstract | The ADVICE system discussed is an enhanced CAD (computer-aided design) linked E-beam tester to locate automatically design errors on custom VLSI devices. The goal is met by building a set of procedures to drive the interactive electron-beam debugging (EBD) system according to the strategies devised by the algorithms based on fault dictionary/hierarchical probing algorithm mixed search | en |
dc.format.extent | 898-907 | en |
dc.format.extent | 775217 bytes | |
dc.format.mimetype | application/pdf | |
dc.language.iso | en | en |
dc.publisher | IEEE | en |
dc.rights | Y | en |
dc.subject | E-beam tester | en |
dc.subject | ADVICE system | en |
dc.subject | VLSI devices | en |
dc.title | Automatic location of IC design errors using an e-beam system | en |
dc.title.alternative | International Test Conference: 1988 | en |
dc.type | Conference Paper | en |
dc.type.supercollection | scholarly_publications | en |
dc.type.supercollection | refereed_publications | en |
dc.identifier.peoplefinderurl | http://people.tcd.ie/fboland | |
dc.identifier.rssinternalid | 51289 | |
dc.identifier.rssuri | http://ieeexplore.ieee.org/iel2/213/5318/00207878.pdf?tp=&isnumber=&arnumber=207878 | |
dc.identifier.uri | http://hdl.handle.net/2262/19679 |
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